Exemplary embodiments relate generally to an integrated circuit, and more particularly to a semiconductor memory device and an operating method thereof.
A nonvolatile memory device retains data stored therein even in absence of power supply. The nonvolatile memory device includes a flash memory device. The flash memory device may be divided into a NOR flash memory device and a NAND flash memory device according to the structure of a memory cell array. The gate of the flash memory cell includes, for example, a tunnel insulating layer, a floating gate, a dielectric layer, and a control gate.
In the case of the NAND flash memory device, a program operation and an erase operation are performed through F-N tunneling. In addition, the floating gate is accumulated with electrons by the program operation, and the electrons accumulated in the floating gate are discharged to a substrate by the erase operation. Furthermore, when a read operation is performed, the threshold voltage of a memory cell, shifted depending on the amount of electrons accumulated in the floating gate, is detected, and data is read on the basis of the detected threshold voltage.
In the operation of detecting the threshold voltage of the memory cell, a random telegraph noise (RTN) phenomenon may occur and thus the threshold voltage of the memory cell may vary according to whether electrons are trapped in or released from the floating gate of the memory cell. In other words, detected threshold voltage of a memory cell may vary even though data stored in the memory cell has not changed owing to the RTN phenomenon. The RTN phenomenon makes it difficult to narrow the width of a distribution of the threshold voltages of memory cells because the threshold voltages of the memory cells verified in a programming process are shifted.